Stepping motor drive device

ABSTRACT

In a stepping motor drive device, it is possible to prevent malfunction due to negative current from a stepping motor of a plurality of power MOSFETs that apply drive voltage in a complementary way to paired coils of the stepping motor. A fall delay circuit delays the timing of the fall of input pulse signals applied in a complementary way to the gate of each of a plurality of MOSFETs that apply drive voltage in a complementary way to paired coils of a stepping motor by a time Td, wherein Td&gt;Trise−Tfall, in accordance with a rise time Trise when turning on, and a fall time Tfall when turning off, the relevant MOSFET, and after one MOSFET is turned on, another MOSFET is turned off.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a stepping motor drive device includinga plurality of insulated gate semiconductor elements (for example, powerMOSFETs) that apply drive voltage in a complementary way to paired coilsof a stepping motor, thus driving the stepping motor.

2. Description of the Background Art

A stepping motor 1 includes a plurality of pairs of coils 3 a, 3 b, 4 a,and 4 b provided enclosing a rotor 2, as shown in FIG. 5. FIG. 5 shows aschematic configuration of a main portion of a two-phase unipolar typeof the stepping motor 1. The stepping motor 1 is excited by currentbeing caused to flow in a complementary way to the paired coils 3 a, 3b, 4 a, and 4 b, as shown in, for example, FIG. 6, because of which therotor 2 is rotary driven in increments of a predetermined angle.

FIG. 7 is a schematic diagram of an overall configuration of a steppingmotor drive device 10 that drives the stepping motor 1. The steppingmotor drive device 10 includes parallel drive circuits 11, 12, 13, and14 that apply drive voltages Vout1, Vout2, Vout3, and Vout4 in acomplementary way to terminals Xa, Xb, Ya, and Yb of the coils 3 a, 3 b,4 a, and 4 b. Input pulse signals Vin1, Vin2, Vin3, and Vin4 generatedby a timing generator 15 and having the kinds of predetermined phasedifference shown in FIG. 6 are input into the drive circuits 11, 12, 13,and 14 respectively, thus generating the drive voltages Vout1, Vout2,Vout3, and Vout4.

Further, the drive circuit 11 (12, 13, 14) includes an insulated gatesemiconductor element, for example, a power MOSFET 22, that is driven onand off by a gate drive circuit 21, generates the drive voltage Vout1(Vout2, Vout3, Vout4), and applies the drive voltage Vout1 (Vout2,Vout3, Vout4) to the coil 3 a (3 b, 4 a, 4 b), as shown in, for example,FIG. 8. Herein, the gate drive circuit 21 receives the input pulsesignal, which is provided via a logic circuit 23, and generates a gatesignal, thus driving the power MOSFET 22 on and off (for example, referto JP-A-2011-239242).

Reference sign 24 in FIG. 8 is an overheat detector circuit that detectsoverheat trouble in the power MOSFET 22 via an unshown temperaturesensor. Also, reference sign 25 is an overcurrent detector circuit thatmonitors the current flowing to the stepping motor (load) 1 viaserially-connected resistors r1 and r2. When overheat trouble isdetected by the overheat detector circuit 24, or when an overcurrent isdetected by the overcurrent detector circuit 25, the logic circuit 23drives on a protective MOSFET 26 connected to the gate of the powerMOSFET 22. By the MOSFET 26 being driven on, the gate voltage of thepower MOSFET 22 is compulsorily set to the ground potential, and thedrive of the power MOSFET 22 is stopped. Because of this, the steppingmotor (load) 1 and power MOSFET 22 are protected from the heretoforedescribed troubles.

Also, when the drive of the power MOSFET 22 is controlled so as to stopby the logic circuit 23 in this way, information thereon is output tothe exterior as a status signal ST via a MOSFET 27. Also, when adisconnection of the stepping motor 1, that is, a disconnection of thecoil 3 a (3 b, 4 a, 4 b) is detected via serially-connected resistors r3and r4, information thereon is output to the exterior as the statussignal ST via a MOSFET 28 provided in parallel with the MOSFET 27.

SUMMARY OF THE INVENTION

Herein, the drive voltages Vout1, Vout2, Vout3, and Vout4 are applied ina complementary way to the paired coils 3 a, 3 b, 4 a, and 4 b of thestepping motor 1 based on the input pulse signals Vin1, Vin2, Vin3, andVin4. Actually, however, the drive voltages Vout1, Vout2, Vout3, andVout4 output by the power MOSFET 22 are slightly delayed with respect tothe input timing of the input pulse signals Vin1, Vin2, Vin3, and Vin4because of the turn-on characteristics of the power MOSFET 22, that is,a rise time Trise when turning on, as shown by an example in FIG. 9.

Because of this, when turning off, for example, the third-phase powerMOSFET 22, there may occur a condition such that the first-phase(opposite phase) power MOSFET 22 paired with the third-phase powerMOSFET 22 is not yet carrying out an on-state operation. This kind ofcondition is liable to occur when driving the stepping motor 1 at a highspeed by increasing the frequency of the input pulse signals Vin1, Vin2,Vin3, and Vin4.

Then, in FIG. 10 schematically showing the element structure of thedrive circuit 11 (12, 13, 14), it is undeniable that a negative currentIout1 flows between the source and drain of the first-phase power MOSFET22 from the coil 3 a, as shown by an arrow A. The negative current Iout1is an induction current caused by mutual inductance among the pluralityof coils 3 a, 3 b, 4 a, and 4 b in the stepping motor 1. Further, thenegative current Iout1 divides into the circuit portions of the drivecircuit 11 (12, 13, 14), as shown by an arrow B, and forms the basecurrent of a parasitic transistor 29 (refer to FIG. 10) of the MOSFETs27 and 28, causing the parasitic transistor 29 to carry out an on-stateoperation.

As a result of this, current flows as shown by, for example, an arrow Cin accompaniment to the on-state operation of the parasitic transistor29, and the status signal ST output via the MOSFETs 27 and 28 changes toan “L” level. Moreover, as the drive current of the power MOSFET 22 isdrawn out by the on-state operation of the parasitic transistor 29, thepower MOSFET 22 becomes unable to carry out an on-state operation. Thisstate continues for in the region of, for example, several hundredmicroseconds until the negative current Iout1 dissipates. Therefore, theon-state operation of the power MOSFET 22 is delayed, leading to damagewhen driving the stepping motor 1 at high speed. Furthermore, the delayalso causes malfunction of the MOSFETs 27 and 28 that output the statussignal ST to the exterior, and the like.

The invention, having been contrived bearing in mind this kind ofsituation, has an object of providing a stepping motor drive device witha simple configuration such that it is possible, even when driving astepping motor at high speed, to prevent malfunction due to negativecurrent from the stepping motor of a plurality of insulated gatesemiconductor elements (for example, power MOSFETs) that apply drivevoltage in a complementary way to paired coils of the stepping motor.

In order to achieve the heretofore described object, a stepping motordrive device according to an aspect of the invention includes aplurality of insulated gate semiconductor elements (for example, powerMOSFETs) provided in parallel that apply drive voltage in acomplementary way to paired coils of a stepping motor, thus driving thestepping motor, and a fall delay circuit that delays the timing of thefall of input pulse signals applied in a complementary way to the gateof each insulated gate semiconductor element by a time Td, whereinTd>Trise−Tfall, in accordance with a rise time Trise when turning on,and a fall time Tfall when turning off, the insulated gate semiconductorelement.

Herein, the time Td is variably set in accordance with the turn-on andturn-off characteristics of the insulated gate semiconductor element.Also, the stepping motor is, for example, a two-phase unipolar type, andthe plurality of insulated gate semiconductor elements perform a role ofturning current supplied to each of the paired coils of the steppingmotor on and off in a complementary way.

Also, the fall delay circuit sets an on-state period Ton to be long incomparison with an off-state period Toff of the insulated gatesemiconductor element by delaying the timing of the fall of the inputpulse signal.

According to the stepping motor drive device configured as heretoforedescribed, it is possible when turning off an insulated gatesemiconductor element (power MOSFET or IGBT) of a certain phase toensure that an insulated gate semiconductor element of an opposite phasepaired with the insulated gate semiconductor element is in an on-stateoperation condition simply by delaying the timing of the fall of theinput pulse signal when driving the insulated gate semiconductor elementon and off. Consequently, even when negative current flows from thestepping motor, the negative current can be absorbed by an insulatedgate semiconductor element that is carrying out an on-state operation.Therefore, there is no occurrence of trouble such as the status signalST changing due to negative current, as has been the case to date.

Consequently, even when driving the stepping motor at high speed byincreasing the frequency at which the insulated gate semiconductorelement is driven on and off, it is possible to achieve a stabilizationof the operation. Also, as the timing of the fall of the input pulsesignal is simply delayed under the previously described conditions, theconfiguration is simple. Therefore, the invention has a large number ofpractical advantages.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a main portion schematic configuration diagram of a steppingmotor drive device according to an embodiment of the invention;

FIG. 2 is a diagram for illustrating an operating principle of theinvention;

FIG. 3 is a signal waveform diagram showing an operation of the steppingmotor drive device shown in FIG. 1;

FIG. 4 is a diagram schematically showing a drive circuit elementstructure and the flow of a negative current flowing from a steppingmotor;

FIG. 5 is a diagram showing a main portion schematic configuration of atwo-phase unipolar type stepping motor;

FIG. 6 is a drive voltage waveform diagram showing an example of drivinga stepping motor;

FIG. 7 is a schematic diagram of an overall configuration of aheretofore known stepping motor drive device;

FIG. 8 is a diagram showing a configuration example of drive circuitsprovided in parallel in a stepping motor drive device;

FIG. 9 is a signal waveform diagram showing an operation of theheretofore known stepping motor drive device; and

FIG. 10 is a diagram schematically showing a drive circuit elementstructure and the flow of a negative current flowing from a steppingmotor.

DETAILED DESCRIPTION OF THE INVENTION

Hereafter, referring to the drawings, a description will be given of astepping motor drive device according to an embodiment of the invention.

FIG. 1 is a schematic diagram of an overall configuration of a steppingmotor drive device 10 according to an embodiment of the invention,wherein the same reference signs are given to portions the same as in aheretofore known device shown in FIG. 7. Consequently, a redundantdescription of identical portions will be omitted.

A characteristic of the stepping motor drive device 10 according to theembodiment is that the stepping motor drive device 10 includes a falldelay circuit 30 that delays the timing of the fall of input pulsesignals Vin1, Vin2, Vin3, and Vin4 generated by a timing generator 15and provided to drive circuits 11, 12, 13, and 14 respectively. Theinput pulse signals Vin1, Vin2, Vin3, and Vin4 are generated withpredetermined phase differences, as previously described, and aresignals for exciting in a complementary way paired coils 3 a, 3 b, 4 a,and 4 b of a stepping motor 1.

Further, the fall delay circuit 30 performs a function of delaying thetiming of the fall of each of the input pulse signals Vin1, Vin2, Vin3,and Vin4 by a time Td, whereinTd>Trise−Tfall,

in accordance with a rise time Trise when turning on, and a fall timeTfall when turning off, a power MOSFET 22, such as those shown in, forexample, FIG. 2.

Specifically, the fall delay circuit 30 delays the timing of the fall ofeach of the input pulse signals Vin1, Vin2, Vin3, and Vin4 by, forexample, 10 μs, so as to satisfy the condition thatTd>Trise−Tfall=12−2.5(μs)=9.5(μs)when the rise time Trise when turning on the power MOSFET 22 is 12 μsand the fall time Tfall when turning off the power MOSFET 22 is 2.5 μs.

Consequently, in comparison with the input pulse signals Vin1, Vin2,Vin3, and Vin4 shown in FIG. 6, input pulse signals Vin1′, Vin2′, Vin3′,and Vin4′ applied to the gate of the power MOSFET 22 in each of thedrive circuits 11, 12, 13, and 14 are such that an on-state period Tonof the power MOSFET 22 is extended by the delay time Td, and conversely,an off-state period Toff of the power MOSFET 22 is shortened by thedelay time Td, as shown in FIG. 2. Further, the power MOSFETs 22 aredriven one each by the input pulse signals Vin1′, Vin2′, Vin3′, andVin4′, wherein the on-state period Ton is set to be longer than theoff-state period Toff.

As a result of this, for example, when turning off the third-phase powerMOSFET 22, the first-phase (opposite phase) power MOSFET 22 paired withthe third-phase power MOSFET 22 is invariably carrying out an on-stateoperation, as shown in FIG. 3. Consequently, even when a negativecurrent Iout1 flows in from the stepping motor 1 as a result of turningoff the third-phase power MOSFET 22, the negative current Iout1 flowsthrough the first-phase (opposite phase) power MOSFET 22, which iscarrying out a turn-on operation, as shown by an arrow D in FIG. 4. Inother words, the negative current Iout1 does not flow as far as aparasitic transistor 29 of MOSFETs 27 and 28, as is the case withheretofore known technology.

Consequently, it does not happen that a status signal ST changes to an“L” level owing to the MOSFETs 27 and 28, or the like, malfunctioningbecause of the negative current Iout1. Also, as the power MOSFET 22 isalready carrying out an on-state operation, there is no occurrenceeither of trouble such as the on-state operation of the power MOSFET 22being delayed, as is the case with heretofore known technology.Therefore, even when driving the stepping motor 1 at a high speed byincreasing the frequency of the input pulse signals Vin1, Vin2, Vin3,and Vin4, it is possible to effectively avoid the heretofore known kindof trouble, and to stably drive the stepping motor 1.

Moreover, as control is simply such as to delay the timing of the fallof each of the input pulse signals Vin1, Vin2, Vin3, and Vin4 under thepreviously described condition with the fall delay circuit 30, asheretofore described, the control is easy. Also, variable setting of thedelay time Td in accordance with the rise and fall characteristics ofthe power MOSFET 22 is also easy. Consequently, it is possible toconstruct the stepping motor drive device 10 at a low price, and easily.

The invention is not limited to the heretofore described embodiment. Forexample, it is, of course, also possible for the fall delay circuit 30to be incorporated in a logic circuit 23, or the like, in each of thedrive circuits 11, 12, 13, and 14. Also, it goes without saying that theinvention can also be applied in the same way when driving a three-phasetype or five-phase type of the stepping motor 1. Furthermore, an IGBTmay also be used as the insulated gate semiconductor element 22, and itis also possible to adaptively set the delay time Td variably inaccordance with the temperature characteristics of the insulated gatesemiconductor element 22.

Also, in the embodiment, a description has been given on the premisethat a general power MOSFET or IGBT is used as the insulated gatesemiconductor element, but it is, of course, also possible to apply theinvention in the same way when employing a switching element that uses awide band gap semiconductor with, for example, SiC, GaN, or diamond (C)as the material. Various other modifications are also possible, withoutdeparting from the scope of the invention.

What is claimed is:
 1. A stepping motor drive device, comprising: aplurality of insulated gate semiconductor elements provided in parallelthat apply drive voltage in a complementary way to paired coils of astepping motor, thus driving the stepping motor; and a fall delaycircuit that delays a timing of a fall of input pulse signals applied ina complementary way to the gate of each insulated gate semiconductorelement by a time Td, whereinTd>Trise−Tfall, in accordance with a rise time Trise when turning on,and a fall time Tfall when turning off, the insulated gate semiconductorelement.
 2. The stepping motor drive device according to claim 1,wherein the time Td is variably set in accordance with turn-on andturn-off characteristics of the insulated gate semiconductor element. 3.The stepping motor drive device according to claim 1, wherein thestepping motor is a two-phase unipolar type, and the plurality ofinsulated gate semiconductor elements turn current supplied to each ofthe paired coils of the stepping motor on and off in a complementaryway.
 4. The stepping motor drive device according to claim 1, whereinthe fall delay circuit sets an on-state period Ton to be long incomparison with an off-state period Toff of the insulated gatesemiconductor element.
 5. The stepping motor drive device according toclaim 1, wherein the plurality of insulated gate semiconductor elementsare power MOSFETs or IGBTs.
 6. An apparatus, comprising: a plurality ofdrive devices configured to apply drive signals to coils of a steppingmotor; and a timing device configured to generate the drive signals witha predetermined timing for controlling a timing of turning on andturning off the plurality of drive devices; wherein the timing device isconfigured to generate the drive signals so that when a drive device ofthe plurality of drive devices is turning off, a complementary drivedevice of the drive device that is turning off is in an on-stateoperation condition.
 7. The apparatus of claim 6, wherein the timingdevice comprises: a timing generator configured to generate, as thedrive signals, pulses each having a rise time Trise and a fall timeTfall; and a delay device configured to delay a time of a fall of eachdrive signal by a time Td, where Td>Trise−Tfall.
 8. The apparatus ofclaim 7, wherein: the stepping motor is a two-phase unipolar type; andthe timing generator is configured to generate the pulses withpredetermined phase differences so that the pulses complementarilyexcite coils of the stepping motor.
 9. The apparatus of claim 8, whereineach drive device includes an insulated gate semiconductor element. 10.The apparatus of claim 9, wherein the insulated gate semiconductorelement includes a power MOSFET.